Search for Senior System-on-Chip Design Engineer positions in Dallas, TX. I have 3-5 years of experience in SoC design, and I'm proficient in SystemVerilog. I'm also looking for full-time roles that focus on micro-architecture specifications.

Okay, I've searched for Senior System-on-Chip Design Engineer positions in Dallas, TX, that require 3-5 years of experience in SoC design and proficiency in SystemVerilog. Additionally, I'm filtering for full-time roles that emphasize micro-architecture specifications. I have found 27 relevant positions for you.

Senior System-on-Chip Design Engineer

Dallas, TX

3-5 years of experience

SystemVerilog

Full Time

Can you help me to analyze the job description and company culture?

Sure. Here's the analysis:

Job Analysis:

The Senior System-on-Chip Design Engineer role at MIPS is fundamentally about innovating and designing high-performance chiplets and automotive microcontrollers that prioritize efficiency and scalability in computing. The primary responsibilities revolve around engaging deeply in the design lifecycle, from gathering requirements to delivering end products, signaling a need for candidates who can integrate their technical know-how with practical project management. Collaboration with cross-functional teams, such as Architecture and Verification departments, will be crucial for problem resolution. The role demands proficiency in digital design, particularly with SystemVerilog or Verilog, and knowledge of bus standards like AXI, AHB, and APB—skills that underline the importance of building robust, scalable architectures. Success in this role will likely manifest in the engineer’s ability to effectively navigate complex design challenges and contribute to streamlined design flows that meet MIPS' evolving demands in RISC-V architecture development.

Company Analysis:

MIPS occupies a pioneering position in the semiconductor industry as a builder of RISC-based computing technologies, having successfully shipped billions of processors over the past few decades. This legacy as a market leader in performance and efficiency creates a dynamic backdrop for the Senior System-on-Chip Design Engineer role. The company's emphasis on innovation and high-performance applications illustrates a culture that embraces agility and collaboration, essential traits for thriving in a fast-paced, evolving environment. Since MIPS is committed to deepening their expertise in the burgeoning RISC-V architecture, this position not only carries significant responsibility but also offers the opportunity to influence technological advancements significantly. The structure appears to support minimal hierarchy, which allows for visibility and engagement with upper management, fostering an environment where one can impact larger company objectives directly. Overall, this role is strategically aligned with MIPS’ goal to revolutionize and scale operations in RISC-V technology, making it an opportune moment for candidates who are looking to innovate within a market that values efficiency and modularity.

Mock up some interview questions based on the job description.

Absolutely. Here are some mock interview questions that could come up:

Tell me about a time when you had to gather requirements from multiple stakeholders for a project. How did you ensure everyone's needs were met?
Describe a challenging problem you encountered in a previous SoC design project. How did you approach solving it?
Can you provide an example of a successful collaboration with cross-functional teams? What role did you play?
How have you ensured your design meets functional safety standards in past projects?
What specific approach would you take to define micro-architecture specifications for a new chip design?
Describe your experience with writing synthesizable SystemVerilog or Verilog. Can you provide an example of a project where these skills were critical?
How do you typically contribute to improving design flows in your engineering projects?
Imagine you are faced with a significant delay in the timeline of a chip design project. How would you communicate this to your team and management?
If you encountered a conflicting opinion during a cross-functional meeting, how would you handle the situation?
Why are you interested in working specifically for MIPS, and how do you see your role contributing to our mission?
How do your values align with MIPS' commitment to innovation and performance in the semiconductor industry?
What excites you about the opportunity to work with RISC-V architecture?
What questions do you have regarding the development of RISC-V products at MIPS?
Can you elaborate on the team dynamics and how this role collaborates with other engineering functions?

Job Details

Overview Company

Senior SoC Design Engineer

MIPS

15 days ago

Highlight

OnsiteFull-time3+ yearsSenior

Summary

MIPS is seeking a Senior System-on-Chip Design Engineer to join their team in Dallas, TX. The role involves designing High-Performance Data Processing Unit Chiplets and Automotive Microcontrollers, contributing to all phases of the design lifecycle.

About the Role

As a Senior System-on-Chip Design Engineer, you will be responsible for gathering sub-system and module level requirements, defining micro-architecture specifications, and developing SoC level IP modules. You will engage in hands-on development of submodule and chip level RTL, contribute to frontend design flows, and collaborate with cross-functional teams to resolve issues.

About You

Required:

Bachelor’s degree in Electrical or Computer Engineering.
3-5 years of experience in SoC or IP design.
Solid understanding of digital design fundamentals.
Strong competency in writing synthesizable SystemVerilog or Verilog.
Understanding of SOC interconnects and bus standards such as AXI, AHB, APB.
Excellent analytical and problem-solving skills.
Proven written and verbal technical communication skills.
Self-motivated, collaborative team player.

Preferred:

Master’s degree in Electrical or Computer Engineering.
Experience with RISC-V, ARM, and/or MIPS CPU architectures.
Knowledge of register description languages (IP-XACT, SystemRDL).
Familiarity with Functional Safety standards (ISO 26262).
Experience with scripting languages such as Python, Tcl, or Perl.
Experience in generating RTL from a specification through scripting techniques.

Benefits

Competitive benefits package including medical, dental, vision, retirement savings, and paid leave.
Opportunity to work with a fast-growing team of technologists.
Autonomy with support from experienced CPU engineers.
Unlimited growth path to expand and grow in your role.
Opportunity to learn about the blossoming RISC-V architecture in cutting-edge applications.

MIPS

MIPS is accelerating compute density in the automotive, cloud and embedded markets. Giving customers the freedom to build unique products for specific workloads, MIPS’ industry-leading cores are configurable, efficient and easy to implement. Its multi-threading methodology delivers advanced scalability and the ability to efficiently move and process data faster. The company’s compute DNA spans more than two decades with billions of MIPS-based chips shipped to date. For more information, visit MIPS.com.

Dallas, TX