About the Role

As a Systems Design Engineer, you will be responsible for creating hardware emulation models, importing design RTL, providing RTL patches, compiling emulation models, and debugging issues during various phases of SoC programs. You will also perform pre-silicon verification and validation, partition large SoC RTL for multi-FPGA platforms, and develop and maintain HAPS/FPGA build infrastructure.

About You

Required:

3-5 years of experience in hardware design.
FPGA Design Experience.
Strong RTL design background using SystemVerilog/Verilog.
Hands-on experience with Synopsys HAPS, Protium, Palladium, or other FPGA/emulation platforms.

Preferred:

Experience with SoC buses and protocols: AXI, ACE, APB, PCIe, DDR, Ethernet, SerDes-based links.
Good debugging skills with tools like Verdi, fsdb analysis.
Expertise in scripting/automation: Python, Perl, Tcl, Make/CMake, Shell.

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Systems Design Engineer (Emulation and Prototyping)

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About the Role

About You

Benefits